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The Icon Bar: Programming: Shadow registers for Latch A and Latch B on Aux I/O
 
  Shadow registers for Latch A and Latch B on Aux I/O
  PaulV (19:51 17/6/2012)
  PaulV (21:05 17/6/2012)
 
Paul Vernon Message #120628, posted by PaulV at 19:51, 17/6/2012
Member
Posts: 135
I've been trawling through the RISC OS 3 PRM's and various bits of source code for the last few hours and I'm getting nowhere.

I'm trying to figure out what the shadow register for Latch A is which is presented as Aux 2 on the Aux I/O header.

Referencing the PRM V1 p144, Latch A is mapped into memory at &3350040 and Latch B is mapped into memory at &3350018.

I've found in some code that Latch B is shadowed at &105 but I can't find any documentation or reference to the address at which Latch A is shadowed.

Is there any particular way I can determine this or does somebody know what the address is already and can share it with me.

Thanks

Paul
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Paul Vernon Message #120629, posted by PaulV at 21:05, 17/6/2012, in reply to message #120628
Member
Posts: 135
Scratch that. I don't need it. I'd misinterpreted the mapping of Latch A and Latch B.

It turns out I only need Latch B to control both Aux1 and Aux 2 passing &20 to set Aux1 and &40 to set Aux2 as per the bit mapping in the Acorn TRM's for Latch B.

Happy days big grin

Paul
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The Icon Bar: Programming: Shadow registers for Latch A and Latch B on Aux I/O